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High and Low priority interrupts on PCH

 
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dlc@frii.com



Joined: 05 Nov 2003
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High and Low priority interrupts on PCH
PostPosted: Wed Aug 04, 2004 11:37 am     Reply with quote

Greetings,

The 18F series has two levels of interrupts, one high and one low priority
whose vectors are at two different addresses. I have not seen this
discussed in the compiler manual and I'm wondering how I tell the compiler
to segregate these two interrupts. I know that there is a keyword "fast"
for the high priority IRQ but I see no discussion on the enabling of priority
interrupts via the high level calls. Am I missing something or do we need
to configure these in assembly through direct access to the IRQ registers?

thanks,
Dennis Clark
TTT Enterprises
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Dennis Clark dlc@frii.com
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rnielsen



Joined: 23 Sep 2003
Posts: 837
Location: Utah

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PostPosted: Wed Aug 04, 2004 1:17 pm     Reply with quote

This is from the Help section:

Quote:

Syntax:
#priority ints

Elements:
ints is a list of one or more interrupts separated by commas.

Purpose:
The priority directive may be used to set the interrupt priority. The highest priority items are first in the list. If an interrupt is active it is never interrupted. If two interrupts occur at around the same time then the higher one in this list will be serviced first.

Examples:
#priority rtcc,rb
Mark



Joined: 07 Sep 2003
Posts: 2838
Location: Atlanta, GA

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PostPosted: Wed Aug 04, 2004 1:41 pm     Reply with quote

Use the fast option to use the high priority int. The compiler will handle setting up the registers for you. Just be careful what you do or call from a high priority int. The compiler's scratch registers are not saved as well as many of the PIC's.
dlc
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more on high and low priority interrupts
PostPosted: Wed Aug 04, 2004 2:25 pm     Reply with quote

Actually, this has no bearing on the question. The #priority directive
simply arranges the order in which the PIR bits are examined and routines
are called for the low priority interrupts.

I've done some experimenting and found that:
* Only 1 high priority interrupt can be defined - Not good, there are
dozens of candidates and you can only use one without spoofing
the system. Hopefully this will be fixed in the future.

* It does not appear to be possible to define a #INT_GLOBAL handler
for the low priority interrupts when you have defined a high priority
interrupt - The compiler complains about duplicate IRQ routines if
you do.

* You cannot do an #INT_GLOBAL and an #INT_GLOBAL FAST to catch
both. In fact, you can't do #INT_GLOBAL FAST at all, the compiler
delivers an unrelated error of "Expecting a (" if you try this. So you
cannot write your own IRQ handling routines for both types within the
C context, at least from my version 3.206. This I think is a bug
because it would seem to be the only way to get multiple high priority
interrupts without going around the compiler.

So, if you want to avoid that costly IRQ query bits block that is generated
when you use interrupts you use the #INT_GLOBAL to turn it off and
do your own. BUT you can't do this and use the high priority interrupt
option, the compiler won't let you. This appears to mean that we have
to hand code in asm (or do a bunch of register sets in C) the interrupt
schedule if you want to have low overhead low priority interrupts and/or
mix multiple high priority interrupts.

Can anyone tell me if I missed something? I did quite a few
experiments using a variety of #INT_ combinations to come up with
this question/observation.

regards,
DLC

rnielsen wrote:
This is from the Help section:

Quote:

Syntax:
#priority ints

Elements:
ints is a list of one or more interrupts separated by commas.

Purpose:
[...]
ckielstra



Joined: 18 Mar 2004
Posts: 3570
Location: The Netherlands

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PostPosted: Wed Aug 04, 2004 4:29 pm     Reply with quote

Quote:
* It does not appear to be possible to define a #INT_GLOBAL handler
for the low priority interrupts when you have defined a high priority
interrupt - The compiler complains about duplicate IRQ routines if
you do.

I tried to do the same in v3.187 and got the same error message. It looks like a bug to me, please report it to CCS and post the response in this thread.

Quote:
* You cannot do an #INT_GLOBAL and an #INT_GLOBAL FAST to catch
both. In fact, you can't do #INT_GLOBAL FAST at all,

CCS have not designed this in a careful way. Currently you are only allowed to define one FAST interrrupt and because you will have to take care of saving all used registers yourself, this is something like a GLOBAL interrupt. Creating multiple FAST interrupts requires some hacking in the single FAST interrupt that you are allowed. CCS could have done a better job here.

Search the archive, about a month ago there have been a few good threads about the FAST interrupt.
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