#reserve warning/error difference between compiler versions

ncdoody · Joined: 30 May 2023 Posts: 12

Updated from 5.075 to 5.115 and what used to be a warning is now an error, i.e. on the line

Ttelmah · Joined: 11 Mar 2010 Posts: 19226

Would help if you told us what chip?.

However it really should be an error, since obviously the compiler cannot
reserve memory where it does not exist, and since it does not exist, will not
use it, so the statement does nothing.

What is the point of this?. What are you actually doing?.

ncdoody · Joined: 30 May 2023 Posts: 12

Apologies, it's legacy code that I'm still trying to understand myself. It's running on a 18C252.

From what I understand so far, they were reserving a ram location for rx/tx buffers. They were using addresses 0x0C0 to 0x0FF, so I believe that means in the general purpose registers of the Bank 0.

Ttelmah · Joined: 11 Mar 2010 Posts: 19226

The addresses from 0x80 to 0xFF, are the upper part of the access bank.
This talks to SFR's, so cannot be used as RAM. This is why the
reserve is not being allowed..... These addresses are the Bank 15
SFR's.
Suspect somebody thought these were part of the low half of this
which is normal RAM.

ncdoody · Joined: 30 May 2023 Posts: 12

So, it seems to me that 0x080h to 0x0FF is in the GPR range of Bank 0 whereas 0xF80 to 0xFFF are in bank 15, i.e. the SFR. From the data sheet "The Access Bank is comprised of the upper 128 bytes in Bank 15 (SFRs) and the lower 128 bytes in Bank 0", but 0x0C0 to 0x0FF is within the upper range of bank 0, i.e. the GPR region. Right?

Ttelmah · Joined: 11 Mar 2010 Posts: 19226

Exactly.
This allows the port lathes and status registers to be accessed without
needing to do a bank switch.
Ypu can though see why the com[iler cannot let you prevent it from
accessing these!....
You need to find the bit of code that is trying to use these addresses,
and work out what it is actually up to.