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setup_comparator argument creation

 
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colin382



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setup_comparator argument creation
PostPosted: Mon Jun 29, 2020 8:45 am     Reply with quote

I'm using an 18F24J11 and would like to use comparator1 set up with the inverting input connected to Vref and comparator2 shut down. This configuration is not shown in 18F24J11.h, but should be possible.
How do I create a hex value for this configuration?
To generalise, how does one construct a hex argument for configurations not given in the device .h file?
temtronic



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PostPosted: Mon Jun 29, 2020 9:44 am     Reply with quote

quick comment...
1st I don't use that PIC but....

I'd use a binary not hex to configure the setup register that way it's a LOT easier to understand which bits you set/clr for whatever feature you need.
I downloaded the datasheet and page 362 seems to have the info you need.
Pay attention to any 'notes' or 'reserved' features/functions, you may NOT be sable to do what you think 'should' be possible though.

Jay
colin382



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PostPosted: Mon Jun 29, 2020 9:54 am     Reply with quote

Hi Jay,
Thanks for the rapid reply. p362 describes the control register, and if the CCS function setup_comparator() didn't exist, that's the way I would go! Plus setting the port pins appropriately.

But in another CCS forum topic it mentions the TRIS register setup is part of the argument used in setup_comparator(), and this is what I don't understand- how the configs in the device .h file map to the given hex parameters.

Any help gratefully received.
Ttelmah



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PostPosted: Mon Jun 29, 2020 11:55 am     Reply with quote

Er. The setting is there for the comparator.
This is controlled by the setting CP1_INVERT. (or CP2 for comparator 2)
All you do is OR this into the other comparator setting. So:

So, something like:

CP1_VREF_F6 | CP1_OUT_ON_F2 | CP1_INVERT

The comparator does not support inverting the inputs. Only the output.
Look at the data sheet diagram. The only 'polarity control' is on the output.

The inputs are always in the order IN-, IN+, so this setting selects
IN- to the Vref (0.6v).

The comparators are shutdown unless selected.

Not sure reading, whether you do want an inverted output (if not, remove
the CP1_INVERT), or whether you actually want an output pin (you can
just read the output in software and not use a pin at all). If this is what
you want then remove the CP1_OUT_ON_F2 setting.
colin382



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PostPosted: Mon Jun 29, 2020 4:16 pm     Reply with quote

The issue is to do with understanding the hex (or binary) equivalences in the .h file

I think I can configure CM1CON as I want it with the following statements:
Code:
#BYTE CM1CON = 0xFD2
CM1CON = 0x8B;               
// comparator 1 enabled, internal o/p, not inverted, interrupt L>H
// do not send o/p to pin, use IRV (Internal Voltage Reference, 0.6v)
enable_interrupts(INT_COMP);
// then deal with the interrupt.

But I would prefer to use setup_comparator() to do the same job.
In the device .h we have, for example
Code:
#define A0_A3_A1_A3  0xfff04

which I read to mean "enable comparator 1 using PIN_A0 (non-inverting) and PIN_A3 (inverting); and comparator 2 using PIN_A1 and PIN_A3. I guess PIN_A3 would be connected to a reference of some sort.
But how does this configuration lead to the value 0xFFF04?
If I knew how, I could create the appropriate symbol for my application, something like A1_A3_NC_NC = 0x????? and then
Code:
setup_comparator(A1_A3_NC_NC);
colin382



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PostPosted: Mon Jun 29, 2020 4:17 pm     Reply with quote

Oops, I meant A1_VR_NC_NC for my application
temtronic



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PostPosted: Mon Jun 29, 2020 4:36 pm     Reply with quote

hmm.... given..
#BYTE CM1CON = 0xFD2
CM1CON = 0x8B;

change 0x8B into the binary version.... 0B10001011
it's a whole lot easier to read the bits.

simple set/clr the bits in the register as you need them say..

CM1CON=0B01001110 ; // comment here what they are !!

The 'odd' looking format in the header has to do with telling the compiler what to do with the pattern of bits. Others can explain in detail but heck it's 'C' , you're supposed to accept it....well, until 'they' mistype a bit or two...then the fun begins...
PCM programmer



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PostPosted: Mon Jun 29, 2020 4:59 pm     Reply with quote

colin382 wrote:

But how does this configuration lead to the value 0xFFF04?

Compile a very small test program and look at the .LST file. Put the
.LST file in Symbolic mode in the compiler options screen.

Code:
..... setup_comparator(A0_A3_A1_A3);
0026:  MOVLW  04
0028:  MOVWF  CCP2CON

002A:  MOVF   TRISA,W   // Set the TRISA register to 0x0F
002C:  IORLW  0F
002E:  MOVWF  TRISA

0030:  MOVLW  03        // Do a short delay
0032:  MOVWF  @00
0034:  DECFSZ @00,F
0036:  BRA    0034

0038:  MOVF   CCP2CON,W
003A:  BCF    PIR2.CM2IF
....................


It's pretty obvious that the top 0x0F in the constant is used to set TRISA.
But let's confirm that belief. Let's make a test program where we #undef
the constant in the .h file, and put in our own. In other words, let's get
creative. In the program below, I've set that top 0x0F to 0x05 as an
experiment:
Code:

#include <18F24j11.h>
#use delay(internal=4M)

#undef  A0_A3_A1_A3
#define A0_A3_A1_A3  0x5ff04


//======================================
void main()
{         
setup_comparator(A0_A3_A1_A3);

while(TRUE);
}

When we compile, we get the following and bingo, it's absolutely the TRIS:
Code:
.......... setup_comparator(A0_A3_A1_A3);
0026:  MOVLW  04
0028:  MOVWF  CCP2CON
002A:  MOVF   TRISA,W
002C:  IORLW  05
002E:  MOVWF  TRISA
0030:  MOVLW  03
0032:  MOVWF  @00
0034:  DECFSZ @00,F
0036:  BRA    0034
0038:  MOVF   CCP2CON,W
003A:  BCF    PIR2.CM2IF


In a similar way you can find out what the middle 0xFF does. It may only
be relevant in certain modes. I didn't investigate it.

A good starting point for your study would be to make a test program
with many setup_comparator() statements, one for every mode in the
.h file. Add others lines with the optional parameters like CP1_INVERT.
Print the .LST file and study it.
Ttelmah



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PostPosted: Tue Jun 30, 2020 1:12 am     Reply with quote

OK.
The reason you are having problems, is that the setup_comparator
function seems to be flawed on this chip.
It has values that should be going to CM1CON and CM2CON, but is
only writing them to one register.
The configurations you want is 'shown', it just doesn't work...

A0_A3_NC_NC_OUT_ON_A4

Report it to CCS, and meanwhile you'll have to use the DIY approach.

It's actually writing to completely the wrong register. Putting values into
CCP2CON.....

PCM's test shows this. Sad
colin382



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PostPosted: Tue Jun 30, 2020 4:05 am     Reply with quote

Thanks to all.
PCM: Very useful example of how to dig in and understand how a CCS built-in function works.

Ttelmah: I have been using CCS compilers for at least twenty years and this is the first time I have exposed a bug! A copy of your response is on its way to CCS.
Ttelmah



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PostPosted: Tue Jun 30, 2020 6:57 am     Reply with quote

It was funny. I looked at PCM_Programmers post, and suddenly found myself
thinking 'why is it writing to CCP2CON and not CMxCON?. I'd suspect a
database error for the chip. I have seen a few of these over the years....

Explains why it doesn't work though... Sad
colin382



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PostPosted: Thu Jul 02, 2020 11:10 am     Reply with quote

Just to comlete the conversation:

It turns out that INT_COMP refers to comparator 2, so one has to configure using CM2CON.

There seems to be no way of creating an interrupt from comparator1
temtronic



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PostPosted: Thu Jul 02, 2020 1:07 pm     Reply with quote

Ok, I got real curious, downloaded the data sheet, and in the comparator section ( 22) both the figure 22-1 and the register description (next page) lead me to believe that interrupts are possible. On page 367, table 22-2 however there's a list of yes/no configurations that do or don't generate interrupts.
You'll have to see if what you need is possible, but from a basic hardware look , the comparator should generate interrupts.

I don't have that PIC and my compiler, like me, is old...so I can't cut code and test. sorry

Jay
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