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PIC24 DMA Rx

 
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nguyendang



Joined: 27 Jun 2018
Posts: 6

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PIC24 DMA Rx
PostPosted: Wed Jun 27, 2018 9:23 pm     Reply with quote

Hello all, i am new here.

Now i have problem from using DMA function for receiving data from UART.

It is totally not work. I will post my code here.

DEVICE: 24FJ128GB204
CCS: 5.048

*my .h file
Code:

#pin_select U1RX=PIN_C6
#pin_select U1TX=PIN_C7
#use rs232(UART1,baud=19200,bits=8, parity=N, stop=1,stream = MyUart)

*my .c file
Code:

#define def_DMA_size 50
#BANK_DMA int8 DMA_buff[def_DMA_size];

void DMA0_ISR(void)
{
   
}

setup_dma(0, DMA_IN_UART1, DMA_BYTE);
dma_start(0, DMA_ONE_SHOT | DMA_FORCE_NOW, &DMA_buff[0]);
enable_interrupts(INT_DMA0);
enable_interrupts(GLOBAL);

I try some days, but the DMA_buff total empty.

Thank you for every one.


Last edited by nguyendang on Thu Jun 28, 2018 2:37 am; edited 1 time in total
Ttelmah



Joined: 11 Mar 2010
Posts: 19195

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PostPosted: Thu Jun 28, 2018 12:20 am     Reply with quote

You don't show us what size you are setting the DMA buffer to. "def_DMA_size" is not shown being defined.

However main problem is in the DMA setup. It needs to be incrementing the destination address and transferring from the UART RX buffer. You are not telling it where to get the data from...
Code:

dma_start(0, DMA_SOURCE_ADDR_UNCHANGED | DMA_INC_DEST_ADDR | DMA_REPEATED | DMA_ONE_SHOT, DMA_buff, getenv("SFR:U1RXREG"), def_DMA_size);


This tells it where to get the data from (U1RXREG), where to put it ('DMA_buff' is the address of it's first byte in C), and how many bytes to transfer (def_DMA_size).

Now you understand that when the interrupt triggers, you have 'def_DMA_size' bytes waiting in the buffer, and your INT_DMA code (you don't show the #INT_DMA0 declaration for this...), actually has to handle this 'straight away', getting the first byte handled before another byte arrives.
You don't want to 'FORCE_NOW'. You can't do a transfer, until data arrives.
nguyendang



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Posts: 6

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PostPosted: Thu Jun 28, 2018 3:30 am     Reply with quote

Thank you so much for your support.

I change my code follow your advice and show the def_DMA_size. But everything is same.

I will post it again here.

My .h file
Code:

#pin_select U1RX=PIN_C6
#pin_select U1TX=PIN_C7
#use rs232(UART1,baud=19200,bits=8, parity=N, stop=1,stream = MyUart)

My .c file
Code:

#define def_DMA_size 50
#BANK_DMA int8 DMA_buff[def_DMA_size];

void DMA0_ISR(void)
{
   
}

setup_dma(0, DMA_IN_UART1, DMA_BYTE);
dma_start(0, DMA_ONE_SHOT, DMA_buff, getenv("SFR:U1RXREG"), def_DMA_size-1);
enable_interrupts(INT_DMA0);
enable_interrupts(GLOBAL);

Should i do something in DMA0_ISR ?

Sorry if any stupid question, i spend time to understand DMA, but not clear to me yet.
Ttelmah



Joined: 11 Mar 2010
Posts: 19195

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PostPosted: Thu Jun 28, 2018 3:47 am     Reply with quote

That is not what I posted. What I have increments the destination address, but leaves the source address fixed. You are omitting this. It also needs to repeat as I show.
nguyendang



Joined: 27 Jun 2018
Posts: 6

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PostPosted: Thu Jun 28, 2018 4:27 am     Reply with quote

Hi, first, thank you.

I understand your mean.

My understand is you talking about

DMA_SOURCE_ADDR_UNCHANGED | DMA_INC_DEST_ADDR | DMA_REPEATED

right?

But, i can not find it in 24FJ128GB204.h

So, in this case, should i config them manually?
Ttelmah



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PostPosted: Thu Jun 28, 2018 6:53 am     Reply with quote

Your chip obviously has different DMA setups to the ones I've used.

Now from your data sheet, we need 'Fixed to block' mode (single source address to a block of destination addresses). This is DAMODE = 01, and SAMODE = 11. Now the setting DMA_PERIF_ADDR, looks like it should set SAMODE to 11 (hurrah). However it doesn't... :(

At this point I'm going to say you need to talk to CCS. Something is radically wrong with the DMA setup on this chip:
Code:

....................    setup_dma(0, DMA_IN_UART1, DMA_BYTE);
00244:  MOV.B   #40,W0L
00246:  MOV.B   W0L,381
00248:  MOV.B   #B,W0L
0024A:  MOV.B   W0L,382
0024C:  MOV     #506,W4
0024E:  MOV     W4,388
....................    dma_start(0, DMA_ONE_SHOT |DMA_PERIF_ADDR , DMA_buff, getenv("SFR:U1RXREG"), def_DMA_size-1);
00250:  BCLR.B  381.7
00252:  MOV.B   #21,W0L
00254:  MOV.B   W0L,380
00256:  MOV     #800,W4
00258:  MOV     W4,384
0025A:  BTSS.B  381.6
0025C:  BRA     264
0025E:  MOV     #31,W4
00260:  MOV     W4,38A
00262:  BRA     268
00264:  MOV     #18,W4
00266:  MOV     W4,38A
00268:  BSET.B  381.7


Now the DMACH0 register which sets the DMA mode, is according to the data sheet at address 0x458. So the settings should be affecting this register. Similarly the count is at 0x460. However it is putting the count into 0x38A. Duh...

It looks as if the setup database for your chip is incorrect. No wonder it isn't working!....

The configuration values in the .h file also don't include the modes I'd expect (there should be options to control both the source and destination address from incrementing or not).

If necessary we can hard code DMA setups directly for the registers, but really I'd talk to CCS and point out that the DMA setup for this chip seems to be fundamentally flawed.
nguyendang



Joined: 27 Jun 2018
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PostPosted: Thu Jun 28, 2018 7:08 pm     Reply with quote

Thank you for your kindly support.

So, seem it no way else to configuration DMA via CCS library.

I may give up this way and try to configuration directly to register
Ttelmah



Joined: 11 Mar 2010
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PostPosted: Fri Jun 29, 2018 12:25 am     Reply with quote

Just ask CCS to correct the definitions.
If you own the compiler this is the sort of thing they will correct very quickly.
It looks as if nobody has tried DMA on your chip, so it has not been spotted that there is an error.
When you think how many hundreds of registers every chip has, and how many hundreds of chips there are, errors like this will occur. Once corrected it sorts it out for future users. Just point it out to CCS.
nguyendang



Joined: 27 Jun 2018
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PostPosted: Fri Jun 29, 2018 12:34 am     Reply with quote

Thank you very much, i got it.

I will ask them. Hope got your support in the future.
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