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something strange with i2c_read in #int_ssp.

 
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nanard-bis
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something strange with i2c_read in #int_ssp.
PostPosted: Tue Feb 11, 2003 11:14 am     Reply with quote

Hello,

I have board with 16f877 in i2c master and 16f876 in i2c slave.
I send with master in 7 bit mode adress->data1->data2.
But something is strange in my slave code:

int D1,D2;
int Ad;

#use I2C(slave,sda=pin_C4,scl=pin_C3,address=0xa0,FORCE_HW)

#int_SSP
void i2c_(){
Ad = i2c_read();/*sspbuf->Ad*/
D1 = i2c_read();/*sspbuf->D1*/
D2 = i2c_read();/*sspbuf->D2*/
BF = 0;
SSPOV = 0;
}

main()
{
enable_interrupts(GLOBAL);
enable_interrupts(INT_SSP);

With this three line in #int_ssp no probleme D1=data1 et D2=data2, but if i eliminate Ad = i2c_read() in #int_ssp
D1=slave adresse 0xa0.
I don't know why i must be read adresse before read data
in reception mode.


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This message was ported from CCS's old forum
Original Post ID: 11537
Tomi
Guest







Re: something strange with i2c_read in #int_ssp.
PostPosted: Tue Feb 11, 2003 11:26 am     Reply with quote

Because you didn't use any direction/event discrimination algorithm in your ISR. SSP interrupt could occur in many cases, especially:
"If the addresses match, and the BF and SSPOV bits are clear, the following events occur:
a) The SSPSR register value is loaded into the SSPBUF register on the falling edge of the 8th SCL pulse.
b) The buffer full bit, BF is set on the falling edge of the 8th SCL pulse.
c) An ACK pulse is generated.
d) SSP interrupt flag bit, SSPIF (PIR1<3>) is set (interrupt is generated if enabled) - on the falling edge of the 9th SCL pulse."

:=I don't know why i must be read adresse before read data
:=in reception mode.
:=
:=
___________________________
This message was ported from CCS's old forum
Original Post ID: 11539
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