asmboy
 
 
  Joined: 20 Nov 2007 Posts: 2128 Location: albany ny 
			
			 
			 
			
			
			 
			
			
			
			
  
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				| AD9850 Serial driver with divisor calculation  function | 
			 
			
				 Posted: Wed Jan 04, 2012 10:39 am     | 
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				Edited with code addition for VERY fast 18f pic master clock >24mhz 3/2016
 
 	  | Code: | 	 		  
 
//  AD9850 notes:   be sure to ground reset pin 
 
//  and set Data 0,1,2 per MFG data 
 
//  using fastio for the pic pins is critical 
 
//  to achieve full performance
 
#define Dlatch pin_B0
 
#define Dclock pin_C3
 
#define Ddata  pin_C5
 
#define DCtog  output_low(Dclock);delay_us(4);output_high(Dclock)
 
#define DLtog  output_high(Dlatch);delay_us(4);output_low(Dlatch)
 
//
 
// do this ONCE after power on 
 
// init the ad9850 with worst case PLL'd PIC  
 
// 4 us delay not required on pics running at less than 20 mhz w/o PLL
 
void ad9850_init(void){   
 
     output_low(Ddata);  // MUST be low to init 
 
     delay_us(4); // added 2016 for PIC18 Fosc>6mhz 
 
     DCtog;
 
     DLtog;
 
}
 
// do I/O to send freq divisor to the ad9850 with zero relative phase
 
// execution time = 150 usec with 16 mhz PIC  clock
 
//
 
void ad9850_setfreq(unsigned int32 infr){ 
 
  unsigned int8 i=0;  unsigned int32 D=0;
 
  #bit curbit=D.0
 
 
  D=infr;   i=0;
 
  do{  //           send 4 bytes of 32 bit integer,in anti_spi order
 
    if(curbit) output_high(Ddata );
 
    else       output_low(Ddata );
 
    output_high(Dclock);    // raise  LATCH pin 
 
    D >>=1;
 
    output_low(Dclock);     //  lower LATCH 
 
  }while(++i<32);
 
  //       this last byte is the 3 control bits and 5 phase bits 
 
  //       defaulting to 0 relative phase for the update
 
  i=0;  output_low(Ddata);  // clock out 5th control byte=0; 
 
  do{
 
    output_high(Dclock);  // raise lower LATCH cmd
 
    i++;
 
    output_low(Dclock);
 
  }while(i<8);
 
  DLtog;   // set data in DDS chip 
 
}
 
//  calculates DDS divisor for a 125 mhz DDS clock HOWEVER ---
 
//  NOTE: this approach LIMITS the useful max freq to less than 12 mhz  
 
//  but has 1 hz resolution   
 
// infreq is the frequency in HZ you want generate the  divisor for 
 
//
 
unsigned int32 adc_makedivisor(unsigned int32 Infreq){  // infreq in hz 
 
   return ((34*infreq)+((361*infreq)/1000));
 
}
 
// full 40 mhz version- HOWEVER --- has less resolution   
 
//
 
unsigned int32 adc_makedivisorH(unsigned int32 Infreq){  // infreq in hz 
 
   return ((34*infreq)+((36*infreq)/100));
 
}
 
 
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