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vtrx
Joined: 11 Oct 2017
Posts: 141
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| 18F4550 PORT E0,E1 |
 Posted: Sun Jun 30, 2019 12:12 pm |
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I do not know why E0 and E1 are not functioning properly as input.
E1 stopped reading and E0 blended with E1.
Can it be some peripheral set?
I'm starting the ports like this:
| Code: | #use fast_io(a)
#use fast_io(b)
#use fast_io(c)
#use fast_io(d)
#use fast_io(e)
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| Code: | setup_psp(PSP_DISABLED);
SETUP_ADC( ADC_OFF );
setup_adc_ports(NO_ANALOGS|VSS_VDD);
setup_comparator(NC_NC_NC_NC);
setup_spi(FALSE);
SETUP_CCP1(CCP_OFF);
SETUP_CCP2(CCP_OFF);
port_b_pullups(true);
set_tris_a(0b11111111);
set_tris_b(0b11111111);
set_tris_c(0b11111111);
set_tris_d(0b11111111);
set_tris_e(0b11111111); |
| Code: | | #fuses XTPLL,NOWDT,PROTECT,NOLVP,NODEBUG,USBDIV,PLL1,CPUDIV1,VREGEN,MCLR,CPB,CPD //4MHZ,USB-48MHZ,CPU-48MHZ |
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PCM programmer
Joined: 06 Sep 2003
Posts: 21708
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| Posted: Sun Jun 30, 2019 12:42 pm |
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Post the code that reads the pins on PortE. Also post what external
circuits are connected to those pins.
Ideally, post a complete, but very short test program that shows the
problem. Don't post code fragments. |
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vtrx
Joined: 11 Oct 2017
Posts: 141
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| Posted: Tue Jul 02, 2019 3:14 pm |
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Solved.
The trail linking the E0 pin was broken.
But why E0 without 5v, would disrupt E1? |
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temtronic
Joined: 01 Jul 2010
Posts: 9097
Location: Greensville,Ontario
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| Posted: Tue Jul 02, 2019 4:17 pm |
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without seeing a schematic it's hard to tell however according to ..
set_tris_e(0b11111111);
... you've enabled the weak pullups on PortE.
Jay |
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