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Simultaneous ADC sampling (dspic33)
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Ttelmah



Joined: 11 Mar 2010
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PostPosted: Mon Feb 01, 2016 11:05 am     Reply with quote

Seriously, the old 'flash an LED' test _first_.

You are telling the chip to use the primary oscillator with PLL, but then don't have a primary oscillator programmed. You then say to run at 80MHz, but give the compiler no data about how fast the oscillator is running so it can program the PLL. I'm fairly sure the chip won't even be running.
Then you are trying to 'run' the program in debug mode, and don't have debug selected.
Then you are setting up the primary adc port twice. Only the second one will apply.
irmanao



Joined: 08 Apr 2015
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PostPosted: Mon Feb 01, 2016 12:23 pm     Reply with quote

As i said in my previous comment, i did the flash an LED test. I am obviously a newbie at this trying to learn. I wrote this code based on my own research on the net.
I have ran many simple programs successfully with these settings (they're probably wrong) and only this particular one shows this message.

Are these settings correct?:
Code:
#fuses FRC_PLL,NOWDT,NOPROTECT
#use delay(internal=117920000)

Code:
setup_adc_ports(sAN0 | sAN3 |  VSS_VDD );

_thanks Smile _
newguy



Joined: 24 Jun 2004
Posts: 1934

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PostPosted: Mon Feb 01, 2016 1:09 pm     Reply with quote

You're trying to set the clock to 117.92 MHz. Are you certain that your PIC's internal oscillator is capable of running at that precise frequency with any combination of fuse & PLL settings?
Ttelmah



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PostPosted: Wed Feb 03, 2016 2:42 am     Reply with quote

I think the phrase 'walk before running', definitely applies.

Simultaneous sampling is something that requires significant skill to use. You need to learn to actually program first. Steps:
1) LED test - hurrah you have done this.
2) UART test - can you send and receive?.
3) More complex number formatting and serial replies.
4) Simple single channel ADC.
5) Sequential readings from the ADC at speed.
6) ADC readings using timer to trigger.
7) Only then consider moving into sequential sampling.
To do sequential sampling with any real 'usefulness', youare probably going to have to take samples at high speed, and use DMA to actually transfer the data. This is a level of programming, that I'd say requires several _weeks_ of work to actually start to do, if you are not experienced at using the chip/compiler....
temtronic



Joined: 01 Jul 2010
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PostPosted: Wed Feb 03, 2016 6:43 am     Reply with quote

I still don't see the actual need for true simultaneous ADC sampling when the signals are at 50Hz. Maybe I'm missing something hidden in the original post but the 'normal' sequence of
...
select ADC channel
delay a bit
read it
select ADC channel
delay a bit
read it
...
is lightning fast,even on a 4MHz PIC compared to the signal frequency of 50Hz( Mains in Europe ?).

My 'gut' feeling this code might be for some kind of Volt-Amp- Power metering device? Perhaps a few more details from the OP would shed light on this ??

Jay
Ttelmah



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PostPosted: Wed Feb 03, 2016 8:34 am     Reply with quote

Dead right Temtronic. Especially when you are talking the ADC on a DsPIC, that can be programmed to acquire then read automatically, and can do the whole sequence (including acquistion), in just a couple of uSec. Even in it's high accuracy mode, the entire sequence is only around 12uSec.
irmanao



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PostPosted: Wed Feb 03, 2016 8:44 am     Reply with quote

This code is not for a power metering device. Just for making calculations with two analog inputs. For example i have two signals at 50Hz, one 0-2.5V and the other 0-3V. I want to abstract the second from the first and see if i actually get 0 every 180 degrees.


For the clock speed I found in the datasheet this:
Code:
Fast RC Oscillator with Divide-by-16 (FRCDIV16)
Ttelmah



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PostPosted: Wed Feb 03, 2016 9:47 am     Reply with quote

The point being made is that there is no need for 'simultaneous'.

Even in it's slowest standard mode, the ADC is capable of taking 2000 readings in the cycle. Run it in high speed mode (limited to 10bit), and this goes up by a factor of 5. 5000 readings in the half cycle.

If we assume the signal is scaled for the full range of the ADC (so 2048 at the '0' point, reaching close to 0 on the negative half cycle, and 4096 on the positive, the difference between two readings 1/10000th cycle apart, at the worst point (where the curve is rising steepest), will only be one count. You are not going to get a genuine resolution to a count, without spending a lot of time and circuitry to build super stable ADC references, and really carefully designed analog circuitry.

Now in fact you are not going to be able to do what you want like this. By the time you have some noise on the signal, actually working out where the zero point 'is' will involve taking multiple sequential readings, and interpolating, to work out the actual 'moment' when the curve crossed zero. Repeat this for a few cycles, till you know the period, then repeat this for the other curve, and compare the times when these two points occur.
temtronic



Joined: 01 Jul 2010
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PostPosted: Wed Feb 03, 2016 2:50 pm     Reply with quote

hmm..I want to abstract the second from the first and see if i actually get 0 every 180 degrees.

Have to ask what guarantee do you have that these two signals are actually in sync? If they are 'off' by even the slighest phase shift, then you'll never get 0 at 180*.

Perhaps if you explained what the signal are from and the purpose, we can better understand what you're really trying to achieve.

It now sounds like some kind of 'zero cross' detection and there are other ways to sense this.

jay
Ttelmah



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PostPosted: Thu Feb 04, 2016 1:48 am     Reply with quote

You are almost certainly never going to get 0.

Simple noise will ensure that this is very unlikely.

Presumably you are intending to run the ADC with an offset on the other input, so you run with the output as a signed integer?. Otherwise the '0' point will actually be in the middle of the ADC range. Unless the signals are ultra pure sine waves, and the whole circuit is built to extremely high standards, and with a much superior Vref than the supply, the probability is that even if you fed in a signal that was exactly 'at' the zero point, you would receive a stream of -1,1,0,1,1,0,-1 etc..
For more normal signals, the spread of results will be even wider....

This is 'real' signal handling, rather than theoretical.
temtronic



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PostPosted: Thu Feb 04, 2016 7:51 am     Reply with quote

re:...
Unless the signals are ultra pure sine waves, and the whole circuit is built to extremely high standards, and with a much superior Vref than the supply.

Mr T has hit the nail on the head ! It's hard enough to get 99% accuracy and repeatability with 8 bit ADC so when you jump to 10 bit mode it really drops unless you are a pro at analog PCB layout, cabling and sensor interfacing. It's really a mix of book based design and real world knowledge that allows 10, 12 and 16 bit ADCs to work. I used to design/build optical emission spectrometer interfaces 30 years ago. 'Fun'...trying to read sub millivolts with a huge RF source sparking away 4' from you.

Jay
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