18F452 4xPLL

[Mike Kress]

I recently started using the 18F452 for a design I'm working on. This part has the ability to run at 40MHz using a 10MHz source, along with the 4xPLL enabled. How do I setup the #use delay at the top of my file? Would I use 40 or 10?

Thanks

Mike
___________________________
This message was ported from CCS's old forum
Original Post ID: 144515878

[john cutler]

:=I recently started using the 18F452 for a design I'm working on. This part has the ability to run at 40MHz using a 10MHz source, along with the 4xPLL enabled. How do I setup the #use delay at the top of my file? Would I use 40 or 10?
:=
:=Thanks
:=
:=Mike

#use delay(clock= 40000000)
___________________________
This message was ported from CCS's old forum
Original Post ID: 144515880

[R.J.Hamlett]

:=I recently started using the 18F452 for a design I'm working on. This part has the ability to run at 40MHz using a 10MHz source, along with the 4xPLL enabled. How do I setup the #use delay at the top of my file? Would I use 40 or 10?
:=
:=Thanks
:=
:=Mike
A 'caveat'. You say '10MHz source'. The PLL, is _very_ critical about the input drive voltage. If the drive swings too far, you can get some very 'odd' behaviours, with the chip running at strange frequencies. Even operating off a crystal, it becomes vital to have a series resistor in a lot of cases to get good stable operation. If running off an external clock input, you may well need to attenuate the signal a little to make the PLL work. If you find the circuit is behaving strangely, you may need to look at this...

Best Wishes
___________________________
This message was ported from CCS's old forum
Original Post ID: 144515881

[Ted Larson]

:=:=I recently started using the 18F452 for a design I'm working on. This part has the ability to run at 40MHz using a 10MHz source, along with the 4xPLL enabled. How do I setup the #use delay at the top of my file? Would I use 40 or 10?
:=:=
:=:=Thanks
:=:=
:=:=Mike
:=
:=#use delay(clock= 40000000)

Also...just to add to this...you will need to make sure your FUSES is correct for a PLL clock.

#fuses H4

- Ted
___________________________
This message was ported from CCS's old forum
Original Post ID: 144515888