CCS C Software and Maintenance Offers
FAQFAQ   FAQForum Help   FAQOfficial CCS Support   SearchSearch  RegisterRegister 

ProfileProfile   Log in to check your private messagesLog in to check your private messages   Log inLog in 

CCS does not monitor this forum on a regular basis.

Please do not post bug reports on this forum. Send them to support@ccsinfo.com

Jitter-Free Clock Divider Using NCO

 
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion
View previous topic :: View next topic  
Author Message
MotoDan



Joined: 30 Dec 2011
Posts: 55

View user's profile Send private message

Jitter-Free Clock Divider Using NCO
PostPosted: Mon Jan 16, 2023 11:48 am     Reply with quote

Hello all,

I'm working with a PIC16F18426 and am planning on using the Fixed Duty Mode (50% square wave) of the NCO to provide a precise, jitter-free output with an external clock as the NCO clock input. The external clock to the NCO will be a TCXO which I need to be able to divide down to various frequencies.

From what I can tell, the only way to get an external clock to the NCO is via the CLC LC1OUT. I plan to route the external clock to an CLC input which will basically just pass-thru to the LC1OUT1 which will clock the NCO.

I could use a separate counter such as a CD4040, but thought I would try doing the division with the NCO.

My main concern is jitter. I have not used the NCO before, but know from past experience that dividers based on PIC timers do not produce a stable output.

Has anyone been able to get a stable output from the NCO? My project can not tolerate any jitter on the divided output.

Thanks!
temtronic



Joined: 01 Jul 2010
Posts: 9160
Location: Greensville,Ontario

View user's profile Send private message

PostPosted: Tue Jan 17, 2023 10:00 am     Reply with quote

Well that just seems 'silly'... can't tie an external clock to the NCO ! You would think THAT would be an option.

I've never used NCO, hmm...'jitter'.. I wonder if when you change the NCO, you might get 'jitter', regardless of the input clock to it ??

It's probably one of those, drag the scope out, cut code and test in the REAL WORLD time

used a LOT of the CD4060 years ago,when I needed a 24Hz clock.....
sigh, I feel old today...thanks.

Jay
MotoDan



Joined: 30 Dec 2011
Posts: 55

View user's profile Send private message

PostPosted: Tue Jan 17, 2023 12:16 pm     Reply with quote

Jay,

Apparently some PICs do have an external input to the NCO. I may keep looking to try and find one that does as well as meets my other criteria.

As far a the jitter rewquirement goes, I'm not concerned about any initial jitter that may occur after updating the NCO. I just need for the NCO output to be stable. I'm hoping that the NCO hardware will not be "interfered with" by other PIC operations.

I gues my age is showing as well, The 4060 counter (and others) were the mainstay back in my early days and still seem to be in demand based on DK's in-stock offerings.

I'll report back once I've tested the NCO...
dyeatman



Joined: 06 Sep 2003
Posts: 1923
Location: Norman, OK

View user's profile Send private message

PostPosted: Tue Jan 17, 2023 12:33 pm     Reply with quote

This link might be of interest..
https://www.microchip.com/forums/m1052841.aspx
_________________
Google and Forum Search are some of your best tools!!!!
MotoDan



Joined: 30 Dec 2011
Posts: 55

View user's profile Send private message

PostPosted: Tue Jan 17, 2023 1:07 pm     Reply with quote

Thanks, I've seen that link and several others.
Ttelmah



Joined: 11 Mar 2010
Posts: 19326

View user's profile Send private message

PostPosted: Wed Jan 18, 2023 2:50 am     Reply with quote

An NCO inherently produces jitter. However it is just one clock. A standard
counter will not have this. The PIC data sheet itself tells you this:
Quote:

This linear advantage over divide-by-n timers comes at the cost of output
jitter. However, the jitter is always plus or minus one NCO clock period that
occurs periodically, depending on the division remainder. For example, when
there is no division remainder then there is no jitter, whereas a division
remainder of 0.5 will result in a jitter frequency one half of the overflow
frequency.


It'll depend on the division you select. So for some divisions there will never
be a remainder, and so no jitter.
If you can chose a multiplier that is a multiple of the divisions you want to
select, voila, no jitter. If not, you will have jitter.

The standard way frequency synthesis is done, is to effectively have an
NCO feeding a PLL.
MotoDan



Joined: 30 Dec 2011
Posts: 55

View user's profile Send private message

PostPosted: Thu Jan 19, 2023 10:58 am     Reply with quote

Well, the results are in. As Ttelmah suggests, there is not discernible jitter when the NCO increment (count) is a binary multiple. Otherwise, the NCO will automatically adjust a separate count (accumulator) to try and average out the desired frequency and thus will cause the NCO's output to wander or jitter.
Display posts from previous:   
Post new topic   Reply to topic    CCS Forum Index -> General CCS C Discussion All times are GMT - 6 Hours
Page 1 of 1

 
Jump to:  
You cannot post new topics in this forum
You cannot reply to topics in this forum
You cannot edit your posts in this forum
You cannot delete your posts in this forum
You cannot vote in polls in this forum


Powered by phpBB © 2001, 2005 phpBB Group