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asmboy
Joined: 20 Nov 2007
Posts: 2128
Location: albany ny
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| CCP compare, frequency generation for the 18f4520 [ints req? |
 Posted: Tue Sep 13, 2011 9:12 am |
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The idea being to use CCP1 as a simple divide by 'n', repetitive
frequency generator based on a variable divisor of the internal clock.
in practice the mode i'm struggling to setup is to use timer 3 with a divide by 1 prescale , compared against the ccpr1H / ccpr1L register pair to generate a frequency output on CCP1 - sans interrupt mediation. Just runnign autonomously based on the correct hardware setup for a 50% duty cycle at various frequencies.
so far i can't seem to make "the pig cross the street"
i think i have a combination of 3 different 'lack of understandings' on:
1- if i have timer 3 setup correct
2- if i have ccp1 setup right
3- if there is a CCS function for properly setting ccpr1H / ccpr1L
in the correct order so as to get the divisor i want
and have not been able to find an example file on simple frequency generation
using ccp compare either.
| Code: |
setup_timer_3(T3_INTERNAL|T3_DIV_BY_1|T3_CCP1_TO_2);
setup_ccp1(CCP_COMPARE_RESET_TIMER);
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Last edited by asmboy on Tue Sep 13, 2011 11:04 am; edited 1 time in total |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19966
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| Posted: Tue Sep 13, 2011 9:42 am |
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First, you need to be using compare mode, toggle output on match, not the reset timer selection (this still resets the timer.....). Read the data sheet. Register 15-1.
So:
| Code: |
setup_timer_3(T3_INTERNAL|T3_DIV_BY_1|T3_CCP1_TO_2);
setup_ccp1(CCP_COMPARE_INT_AND_TOGGLE);
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The 'reset timer' mode, doesn't change the output pin.
You need to ensure the CCP pin is programmed as an output (tris bit = 0).
Then setting the CCP registers to give different times, is just a matter of using:
CCP_1 = val_you_want;
Best Wishes |
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asmboy
Joined: 20 Nov 2007
Posts: 2128
Location: albany ny
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| Posted: Tue Sep 13, 2011 11:03 am |
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MUCH improved but i wish that did it.
i still have a bizarre problem with:
| Code: |
#include <18f4520.h>
#fuses HS,NOPROTECT,NOMCLR,NOWDT,NODEBUG,NOLVP,NOIESO,
#fuses NOFCMEN,PUT,NOWRT,NOFCMEN,BROWNOUT,BORV42,
#fuses CCP2C1,NOPBADEN,NOLPT1OSC,noxinst,
#use delay(clock=16588800) //
#include <DISR576.h>
#use rs232(baud=57600, xmit=PIN_C6, rcv=PIN_C7, ERRORS )
#use fast_io(c);
output_c (0); set_tris_c ( 0b11000000 );
setup_timer_3(T3_INTERNAL|T3_DIV_BY_1|T3_CCP1_TO_2);
CCP_1=1023; // set for base freq
setup_ccp1(CCP_COMPARE_INT_AND_TOGGLE);
void showccp(void){ printf("C=%LU\r",CCP_1); }
void setf(void){
CCP_1 = atol(ArgumentString); // 0-65535 string input
showccp();
}
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when i first call showccp - it reports 1023
when i call setf() - after that - showccp reports any new value i enter for
CCP_1 and keeps on reporting that correct value as often as i ask.
the LST file shows that the proper registers are being loaded.
BUT: PIN_c2, output CCP1 -ONLY generates a constant 31.646 HZ ,
which is my internal clock (HS xtal div 4)
further divided by 131072 ( 65536*2)
on my DSO screen - all i see is a faint flicker in the waveform when i set a new CCP_1 value - but at least that is consistent
do i have to clear an #INT - & mess with registers to make this
work right ?
its as if the working compare register is only set ONCE when i actually change the value - but after first compare success - it all breaks down
and reverts to using 0xFFFF as the compare toggle trigger
i am still missing something important here |
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asmboy
Joined: 20 Nov 2007
Posts: 2128
Location: albany ny
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| Posted: Tue Sep 13, 2011 2:00 pm |
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so as i so much feared -
i had to handle the CCP1IF
#INT and do a set_timer3(0); for every compare --- to generate nice square waves of my choice. ---
too bad the INT overhead effectively crashes the PIC for
CCP_1 values less than about 18.
so as far as USEFUL freq rates - no higher than about 2 khz with a 16.5888 mhz clock seems the order of the day - with less than 200 HZ being the sweet spot.
even at ccp_1=31 - the interrupt density is so excessive - there is no useful CPU time left to do anything else BUT generate signals
i have yet to discover any setup that does NOT require #int , intervention to reset timer3 - to keep freq generation going ;-)) |
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