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kender
Joined: 09 Aug 2004
Posts: 768
Location: Silicon Valley
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| [OT] I2C buffer P82B96 changes the signal level |
 Posted: Sun Jan 20, 2008 7:34 pm |
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Colleagues,
This question is not directly related to PICs, but it originates from a PIC system.
My I2C bus goes through a P82B96 buffer. But when the slave sends the ACK, the buffer increases the level of the signal, instead of just buffering it.
You’ll notice that the values for pull-ups on the slave side are somewhat high, and as a result, the slave device (PCA9536) can’t pull the SDA line all the way down. That certainly is a part of a problem. I expected P82B96 to either maintain/buffer this level or produce a logic level (either 0V or 3.3V). Instead, it increases this level, and I don’t understand why is it doing that?
Cheers,
- Nick
P.S. The bus speed is 100kHz.
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Last edited by kender on Sun Jan 20, 2008 9:49 pm; edited 1 time in total |
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bwhiten
Joined: 26 Nov 2003
Posts: 151
Location: Grayson, GA
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| 470R? |
| Posted: Sun Jan 20, 2008 7:48 pm |
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Why such strong pullups on the slave side? Recommended values? or part of an existing design?
It may be that the signal your seeing on the Master side during the ACK is just a repeat from the slave side. If this buffer actively determines the direction of the driving signal, it may be confused by the low level coming in from the slave side and not know which way to buffer, possibly....... |
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kender
Joined: 09 Aug 2004
Posts: 768
Location: Silicon Valley
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| Re: 470R? |
| Posted: Sun Jan 20, 2008 8:02 pm |
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| bwhiten wrote: | | Why such strong pullups on the slave side? Recommended values? or part of an existing design? |
There will be 2m cable on the slave side the mail purpose of P82B96 is to drive this cable. During the experiment in which the waveforms were recorded, the whole bus was 10cm long; there was no cable. The waveform shows that the P82B96 can sink enough current to drive these strong pullups. The PCA9536 (slave) can't drive the SDA all the way down.
| bwhiten wrote: | | It may be that the signal your seeing on the Master side during the ACK is just a repeat from the slave side. |
It should be a repeat. The question is - is is an analog repeat or a logic repeat? The datasheet says (ch.7) that P82B96 does a logic level detection:
| P82B96 datasheet wrote: | | The logic level of Rx is determined from the power supply voltage VCC of the chip. Logic LOW is below 42 % of VCC, and logic HIGH is above 58 % of VCC (with a typical switching threshold of half VCC). |
If that's true, the ACK bit shoud be 0V on the Master side, because ACK produced by the PCA9536 is well below 42% of Vcc.
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Read the label, before opening a can of worms. |
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bwhiten
Joined: 26 Nov 2003
Posts: 151
Location: Grayson, GA
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| Posted: Sun Jan 20, 2008 8:18 pm |
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What frequency are you running the bus? The data sheet lists some degradation from the 400KHz standard. If you were to be running too fast possibly the master buffer has not turned off when the slave is trying to drive ACK.
Just hypothesizing a little but could the Master be transmitting something at the same time as the slave ACK bit? I'm having trouble understanding why the slave level of ACK is so weak with those strong pullups. |
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kender
Joined: 09 Aug 2004
Posts: 768
Location: Silicon Valley
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| Posted: Sun Jan 20, 2008 9:22 pm |
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| bwhiten wrote: | | What frequency are you running the bus? |
I’m running the bus at conservative 100kHz.
| bwhiten wrote: | | Just hypothesizing a little but could the Master be transmitting something at the same time as the slave ACK bit? |
Doubt it. Just in case, I wrote a code that sends only the address byte. That’s all it does. ACK bit has the voltage level.
| bwhiten wrote: | | I'm having trouble understanding why the slave level of ACK is so weak with those strong pullups. |
ACK is active-low (0V – ACK, Vcc – NACK). Since the pullups are a bit too strong, the ACK bit doesn’t go all the way down to 0V. It’s still below 42% of Vcc, so the PCA9536 should view it as logic low and output 0V on the Master side. The pull-ups on the master side are weak, and I think PCA9536 is perfectly capable of driving them.
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Read the label, before opening a can of worms. |
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bwhiten
Joined: 26 Nov 2003
Posts: 151
Location: Grayson, GA
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| Posted: Sun Jan 20, 2008 9:38 pm |
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| kender wrote: | | ACK is active-low (0V – ACK, Vcc – NACK). Since the pullups are a bit too strong, the ACK bit doesn’t go all the way down to 0V. |
So your thinking is that the master buffer stops driving the slave side just before the ACK bit timing. At that point the slave device is trying to hold the bus low for ACK by itself, but isn't able to and that's why the ACK signal is at about 0.4 volts? That may be as the waveform appears to show the master rising edge (pink) just before the slave rising edge (blue) during the ACK timing. But if you look both waveforms at the end of the ACK bit easily fall low again. This still looks as if the master side is in control and the slave side is fighting it. I know you said you wrote code to be sure this wasn't happening. Can you temporarily increase the size of the slave pullup to something more I2C like? This may give you another hint as to what is wrong. I do agree the buffer datasheet points to a logic transition not analog and the only thing I can think of that explains your waveforms is two competing signals. |
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Ttelmah
Guest
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| Posted: Mon Jan 21, 2008 6:04 am |
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Try reading the data sheet!....
Page 2. Third paragraph down.
"A regular I2C low, applied to the Rx/Ry of a P8296B is propagated to Sx/Sy as a buffered low with a slightly higher voltage level".
The 82B96, just like a RS232 buffer, or a RS485 buffer, produces a completely distinct signalling level, which _must_ go to another similar buffer to be decoded 'back' to regular I2C.
I use these, with 12v signalling, over long runs, for which they are ideal, but they are _not_ designed as unity gain I2C current transceivers, accepting both I2C in, and producing I2C out.
Best Wishes |
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rnielsen
Joined: 23 Sep 2003
Posts: 852
Location: Utah
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| Posted: Mon Jan 21, 2008 10:30 am |
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The pull-ups on your slave side are a bit low value. You might consider using a bus accelerator to help square up your signals and pull the line low when needed. I've used an LTC1694-1 in several of my projects and it help the bus react faster. Just an idea.
Ronald |
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