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about ADC time acquisition

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nfs

Joined: 28 Apr 2004
Posts: 18

about ADC time acquisition
Posted: Mon May 03, 2004 6:52 am

does the ADC can read a voltage every 100µs during 3s and give me the result? if nop what's the minimum acquisition time _________________ nfs

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Re: about ADC time acquisition

Posted: Mon May 03, 2004 12:43 pm

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nfs wrote:

does the ADC can read a voltage every 100µs during 3s and give me the result? if nop what's the minimum acquisition time

the T_aquision depends on the used crystal.
with a 20MHz crystal u cen get ~ every 75uS(t_aq + t_channelswitch, etc ...) a new value from your adc into a 16b variable.

Haplo

Joined: 06 Sep 2003
Posts: 659
Location: Sydney, Australia

Posted: Mon May 03, 2004 5:42 pm

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Quoting from datasheet (PIC16F877):

Quote:

To calculate the minimum acquisition time,
Equation 11-1 may be used. This equation assumes
that 1/2 LSb error is used (1024 steps for the A/D). The
1/2 LSb error is the maximum error allowed for the A/D
to meet its specified resolution.

EQUATION 11-1: ACQUISITION TIME
TACQ=Amplifier Settling Time +
Hold Capacitor Charging Time +
Temperature Coefficient
=TAMP + TC + TCOFF
=2µs + TC + [(Temperature -25°C)(0.05µs/°C)]

TC =CHOLD (RIC + RSS + RS) In(1/2047)
=- 120pF (1kΩ + 7kΩ + 10kΩ) In(0.0004885)=16.47µs

TACQ=2µs + 16.47µs + [(50°C -25°C)(0.05µs/°C)=19.72µs

The A/D conversion time per bit is defined as TAD. The
A/D conversion requires a minimum 12TAD per 10-bit
conversion. For correct A/D conversions, the A/D conversion clock
(TAD) must be selected to ensure a minimum TAD time
of 1.6 µs.
After a conversion has completed, a 2.0TAD delay must complete before acquisition can begin again. During this time, the holding capacitor is not connected to the selected A/D input channel.

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