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Selecting the A/D Conversion

 
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Selecting the A/D Conversion
PostPosted: Fri Apr 09, 2004 1:27 am     Reply with quote

Hello
On A/D of PIC16F877 the datasheet says The A/D conversion time per bit is defined as TAD. The A/D conversion requires a minimum 12TAD per 10-bit conversion. It also says for crystal frequencies up to 5Mhz, TAD should be 8TOSC, and for crystal frequencies up to 20MHz, it should be set to 32TOSC. Now let's do some calculations:

For a 4MHz crystal:
TAD=8TOSC=2us
Time needed to finish one conversion=12TAD=24us

For a 8MHz crystal:
TAD=32TOSC=4us
Time needed to finish one conversion=12TAD=48us (!)

So does this mean doubling the crystal frequency will effectively slow down the A/D conversion by a factor of two?
Guest








PostPosted: Fri Apr 09, 2004 1:38 am     Reply with quote

"For correct A/D conversions, the A/D conversion clock
(TAD) must be selected to ensure a minimum TAD time
of 1.6 us."
Using 4MHz and div8 you can fit this req. but with 8MHz you have to use div32 (div8 gives 1usec TAD what is out of range).
Try to use the internal RC osc.
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PostPosted: Fri Apr 09, 2004 4:20 am     Reply with quote

Sorry, but that was not the answer I was looking for. I had a,ready mentioned I needed to use 32TOSC.
And the datasheet doesn not recommend using internal RC for high crystal frequencies such as 8MHz.
Anybody can help me here please?
Ttelmah
Guest







PostPosted: Fri Apr 09, 2004 5:28 am     Reply with quote

Anonymous wrote:
Sorry, but that was not the answer I was looking for. I had a,ready mentioned I needed to use 32TOSC.
And the datasheet doesn not recommend using internal RC for high crystal frequencies such as 8MHz.
Anybody can help me here please?

At the end of the day, you have allready worked out the answer, so why ask the question?.
Basically, Tad, should not fall below 1.6uSec, for correct operation. Since the dividers avaliable 'jump' in factors of 4*, when you reach the frequency, where the next divider needs to be selected, there will be an effective quadrupling in the sample time. In your case, since the clock doubles, the time only increases by a factor of 2.
The data sheet _does not_ advise against using the RC oscillator at higher frequencies, but it recommends that it is only used for 'sleep mode' sampling, since otherwise the asynchronous nature of the processor noise can be unacceptable. If you use the option to sleep, and wake when the conversion is complete, the conversion time is about as good as possible, with the best noise performance. You might want to consider this.

Best Wishes
Guest








PostPosted: Fri Apr 09, 2004 6:08 am     Reply with quote

Thanks. So does this mean if I double my XTAL from 4MHz to 8MHz, it might actually slow down my circuit (depending on the code, because of the A/D conversion time bottleneck)?
Guest








PostPosted: Fri Apr 09, 2004 11:11 am     Reply with quote

8/4 < 32/8 is your question? I am pretty sure that 2<4. Especially in this season...
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