I2C interface does double reads

[Edward Cheung]

I am using two '877s communicating by I2C. The slave is
using the hardware SSP.

When the Master reads from the Slave, I get two read events
on the Slave side. I have read the past posts on I2C and
learned a lot, but this one is still puzzling me. I hope
someone can help me.

Code on Master:
#include <16F877.h>
#DEVICE PIC16F877 *=16 ICD=TRUE
#fuses HS,NOPROTECT,PUT,NOLVP
#use delay(clock=20 000 000)
#use i2c(MASTER, SDA=PIN_A5, SCL=PIN_A4, SLOW)
#use FAST_IO(C)

char data,new;

void main(void) {

i2c_stop();
data = 0;
while (1) {

// write data to slave
data++;
i2c_start();
i2c_write(0x0A);
i2c_write(data);
i2c_write(data+1);

// read from slave
i2c_start();
i2c_write(0x0B);
new= i2c_read(0);

// done for now
i2c_stop();
delay_ms(10);
}
}


Code on slave (has RS232 echo to make sure it is still
alive, and displays I2C events from interrupt handler):
#include <16F877.h>
#DEVICE PIC16F877 *=16 ICD=TRUE
#fuses HS,NOPROTECT,PUT,NOLVP
#use delay(clock=20 000 000)
#use i2c(SLAVE, SDA=PIN_C4, SCL=PIN_C3, address=0x0A, SLOW, NOFORCE_SW)
#use FAST_IO(C)
#use rs232(baud=57600, bits=8, parity = N, xmit=PIN_C6, rcv=PIN_C7)

char data,new,read,count;

#INT_SSP
void ssp_interrupt(void) {
if (i2c_poll() == FALSE) {
// read operation from master, return incrementing data
i2c_write (count);
count++;
read = TRUE;
} else {
// write operation from master, store data received
data = i2c_read();
new = TRUE;
}
}

void main(void) {
printf("I2C Test\n\r");
enable_interrupts(GLOBAL);
enable_interrupts(INT_SSP);
new = FALSE;
read = FALSE;
count = 0;

while (TRUE) {
if (kbhit()) {
printf("\%c\n\r",getch());
}
if (read) {
read = FALSE;
printf("R\n\r");
}
if (new) {
new = FALSE;
printf("\%x\n\r",data);
}
}
}
___________________________
This message was ported from CCS's old forum
Original Post ID: 1590

[Edward Cheung]

:=When the Master reads from the Slave, I get two read events
:=on the Slave side. I have read the past posts on I2C and
:=learned a lot, but this one is still puzzling me. I hope
:=someone can help me.

Found it. The second read is an interrupt that occurs
when the STOP is sent from the Master. I can differentiate
this one from the real read by checking the SSPSTAT register.

At least the above is what I gather from my trying several
things, if I am still incorrect, I hope someone will let
me know.....
___________________________
This message was ported from CCS's old forum
Original Post ID: 1592