Ttelmah
Joined: 11 Mar 2010 Posts: 20118
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Posted: Mon Aug 17, 2026 12:35 am |
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First thing to get your head around, is that these are not 'dual core' in the
sense that a PC processor is. These are effectively two separate processors,
where you can setup resources to be available to one or the other, and
with a mailbox system to communicate between. Absolutely fabulous
if for example, you want values read from something like an ADC, and then
'pre-processed', and fed to a main program.
For debugging, have a look at this:
[url]
https://www.ccsinfo.com/newsdesk_info.php?newsdesk_id=264
[/url]
Though I hate MPLAB X, this does allow you to debug both cores through
one ICD connection, while CCS requires two. However I have found the
MPLAB system to be almost unusable, so possibly CCS are right in not
supporting this.....
For setup, ex_ch_master, and ex_ch_slave in the examples, show how
the dual core chip code is setup. Yes, stuff is loaded by the master into
the slave. The code always comprises two separate programs, one for
the master core, and one for the slave. |
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