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Ports mapped into memory

 
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ibg



Joined: 19 Nov 2003
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Ports mapped into memory
PostPosted: Fri Jan 16, 2004 4:12 am     Reply with quote
Hi once again ;)

In the PIC18F452, the ports are mapped into memory from the direction F80h(PORTA) till F84h(PORTE).

If I read data coming from a port (let's say PORTA), are those 8 bits always place into the memory address where they are mapped (in case PORTA, in F80h)?

Thanks,

Imanol
Ttelmah
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Re: Ports mapped into memory
PostPosted: Fri Jan 16, 2004 4:29 am     Reply with quote
ibg wrote:
Hi once again ;)

In the PIC18F452, the ports are mapped into memory from the direction F80h(PORTA) till F84h(PORTE).

If I read data coming from a port (let's say PORTA), are those 8 bits always place into the memory address where they are mapped (in case PORTA, in F80h)?

Thanks,

Imanol

Basically yes.
There are some 'caveats'. There is a slight electrical delay involved (both from the actual propogation times in the gates, and as the result of capacitance on the pins). So (for instance), if you write data 'out' to the address, and then immediately read the address, the capacitance on the port pins, may imply that the signals have not yet 'reached' the levels so that the read doesn't return the expected data. This is why the 'output latch', is also available on these latter chips, as a seperate register. So you have the output latch, from which you can 'read', the data pattern currently being 'driven' (for the bits being used as outputs), and the actual 'port' address, where a 'read' will return the current electrical 'state' of the pins.
Normally (so long as the load is not too silly), provided you allow at least an instruction time between a 'write', and a 'read', everything is OK.

Best Wishes
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