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Eeprom reading time

 
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vtrx



Joined: 11 Oct 2017
Posts: 141

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Eeprom reading time
PostPosted: Wed Nov 11, 2020 3:46 pm     Reply with quote

Do I need to generate a delay between reading one internal Eeprom address and the other?


Code:
   avulso1=read_eeprom(96);
   avulso2=read_eeprom(97);
   avulso3=read_eeprom(98);
   avulso4=read_eeprom(99);
temtronic



Joined: 01 Jul 2010
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Location: Greensville,Ontario

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PostPosted: Wed Nov 11, 2020 3:54 pm     Reply with quote

Probably not, the 'driver' or 'function' or 'code' should take care of any required 'timings'.
However it depends on WHO wrote the read_eeprom(xxx) function.
I don't know who wrote it....though I suspect CCS ??
If CCS, then no problem, if someone else, you'd have to consult with them of disassemble their code to see what's being done.

Jay
vtrx



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PostPosted: Wed Nov 11, 2020 3:57 pm     Reply with quote

temtronic wrote:
Probably not, the 'driver' or 'function' or 'code' should take care of any required 'timings'.
However it depends on WHO wrote the read_eeprom(xxx) function.
I don't know who wrote it....though I suspect CCS ??
If CCS, then no problem, if someone else, you'd have to consult with them of disassemble their code to see what's being done.

Jay


CCS.
PCM programmer



Joined: 06 Sep 2003
Posts: 21708

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PostPosted: Wed Nov 11, 2020 5:11 pm     Reply with quote

No. The 18F46K22 data sheet, for example, says nothing about a delay
between sequential eeprom read operations.
Ttelmah



Joined: 11 Mar 2010
Posts: 19195

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PostPosted: Thu Nov 12, 2020 1:44 am     Reply with quote

As others have said, no.

If you actually look at what happens inside the chip, you load the
address registers, and set the RD bit, the byte is available immediately
(the very next instruction). A EEPROM read is fundamentally instantaneous.
It's worth realising that though there are slight technical differences
between EEPROM and flash memory, this is exactly what is happening for
every single instruction being read when you run your program.

Writes are the part that needs delays. Reads don't.

If you look at the 'Data EEPROM' section of the data sheet, you have:
Quote:

To read a data memory location, the user must write
the address to the EEADR register, clear the EEPGD
control bit of the EECON1 register and then set control
bit, RD. The data is available on the very next instruction
cycle; therefore, the EEDATA register can be read
by the next instruction. EEDATA will hold this value until
another read operation, or until it is written to by the
user (during a write operation).

So you set the bit and the data is available immediately.
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