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norman_tan
Joined: 30 Jan 2008
Posts: 27
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 Posted: Sun Dec 17, 2017 3:23 am |
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Dear Ttelmah,
I also set the address as you showed in earlier post. It was real easy. Thanks!
There are still many uncertain factors in 18F family for PMP functions in CCS. I am hesitating whether I should use this chip or not in this PMP project.
I mounted the new PCB with PIC24FJ128GB108 chip just now, and edit a small codes for test:
| Code: |
#fuses HS,NOWDT,PROTECT,NODEBUG
setup_pmp(PAR_ENABLE|PAR_STOP_IN_IDLE|PAR_PTWREN_ENABLE|PAR_PTRDEN_ENABLE|PAR_CS_00|PAR_WAITM1|PAR_ADDR_NOT_MULTIPLEXED|PAR_MASTER_MODE_1,0x1FFF);
while(1)
{
delay_ms(300);
pmp_address(0x01FF);
pmp_write(0x0F);
delay_ms(300);
pmp_address(0x01F0);
pmp_write(0xF0);
}
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Now I can fetch the signal change at WR/RD pins and Address/Data port. But strange things are: 1. Signal at RD pin is reverse (low active). 2. No signal at CS0/1 pins. 3. Device stops there after several minutes, then goes on, repeat this operation. 
No watch dog timer used here.
For issue-1:Signal at RD pin is reverse (low active), this is caused by the Master Mode 1, if select Master Mode 2, nothing at both WR and RD pins. I get this result on both 18s and 24s chips, strange! |
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norman_tan
Joined: 30 Jan 2008
Posts: 27
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| Posted: Mon Dec 18, 2017 12:43 am |
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Dear Ttelmah, RF_Developer and PCM programmer,
I finally can control the PMP(Master Mode 2, for 18s I used the original method, for 24s I used functions as SETUP_PMP) well now after studying the manual carefully again and again! I think I must report it to you all. Thank you very much!
After have changed some settings for those registers all signal at WR, RD, CS, IRQ pins, DATA port, Address Port can be fetched with an oscilloscope. They are working as expected.
Here I attach the settings for 18f87j11 family:
| Code: |
// Init the Parallel Master Port as Master Mode 2:
// PMCS1 and PMCS2 function as chip select, CS2P/CS1P/WRSP/RDSP active-high
// PMA15 and PMA14 function as PMCS2 and PMCS1 - this set is important! or else no signal at these 2 pins
// Master Mode 2 (PMCSx, PMRD, PMWR, PMBE, PMA<x:0> and PMD<7:0>)
// 8-Bit mode: Data register is 8 bits
// Interrupt is generated at the end of the read/write cycle
// PMA<12:0> function as PMP address lines(PMA13 ignored here, let it be)
// No increment or decrement of address after every read/write
void PMP_init(void)
{
// ---------------------------------- Start of PARALLEL MASTER PORT settings --------------------------------------
PMCONH = 0xA7; // PMPEN:1 = PMP is enabled,
// PSIDL:1 = Discontinues module operation when device enters Idle mode(PMCONH = 0xA7); or else PMCONH = 0x87;
// ADRMUX<1:0>:00 = Address and data appear on separate pins
// PTBEEN:1 = PMBE port is enabled,
// PTWREN:1 = PMWR/PMENB port is enabled,
// PTRDEN:1 = PMRD/PMWR port is enabled
PMCONL = 0x9F; // PMCS1 and PMCS2 function as chip select, CS2P/CS1P/BEP/WRSP/RDSP active-high
PMMODEH = 0x22; // BUSY: Busy bit (Master mode only and Read only):1 = Port is busy, 0 = Port is not busy
// IRQM<1:0>:01 = Interrupt is generated at the end of the read/write cycle - OK
// INCM<1:0>:00 = No increment or decrement of address,
// MODE16:0 = 8-Bit mode: Data register is 8 bits, a read or write to the Data register invokes one 8-bit transfer
// MODE<1:0>:11 = Master Mode 1 (PMCSx, PMRD/PMWR, PMENB, PMBE, PMA<x:0> and PMD<7:0>) - PMMODEH = 0x23(WR and RD are inverted signals)
// MODE<1:0>:10 = Master Mode 2 (PMCSx, PMRD, PMWR, PMBE, PMA<x:0> and PMD<7:0>) - PMMODEH = 0x22 - OK
PMMODEL = 0x00; // Do not know how to set it, let it be default value
PMEH = 0xDF; // PMA15 and PMA14 function as either PMA<15:14> or PMCS2 and PMCS1,PMA<12:8> function as PMP address lines
PMEL = 0xFF; // PMA<7:2> function as PMP address lines,PMA1 and PMA0 function as either PMA<1:0> or PMALH and PMALL
IBOV = 0; // Other bits of PMSTATH is read only, but this bit has both read and write function
// When it is readed as 1, then must clear it. PMSTATH is STATUS HIGH BYTE REGISTER
OBUF = 0; // Other bits of PMSTATL is read only, but this bit has both read and write function
// When it is readed as 1, then must clear it. PMSTATL is STATUS LOW BYTE REGISTER
PMPEN = 1; // PMP is enabled
//PMPEEN = 0; // PMBE port is disabled(for 16-bit data only)
PTWREN = 1; // PMWR port is enabled
PTRDEN = 1; // PMRD port is enabled
//PMPTTL = 0; // 1 = PMP module uses TTL input buffers, 0 = PMP module uses Schmitt Trigger input buffers
// ---------------------------------- End of PARALLEL MASTER PORT settings --------------------------------------
}[/color]
[color=brown]while(1)
{
delay_ms(2000);
PMADDRH = 0xC0;
PMADDRL = 0xff;
//The PMDIN1 register is used for input and output data in Master modes.
//PMP_data = 0xF0;
//PMDIN1L = PMP_data; // used for write data test
PMP_data = PMDIN1L; // data read test - used an 8-bit code switch for this test
lcd_gotoxy(1,1);
lcd_putc("DATA is=");
lcd_gotoxy(1,2);
Lcd_display_byte(1,2,PMP_data);// used a 2*8 LCD for show data which read from data port
delay_ms(2000);
PMADDRH = 0xCf;
PMADDRL = 0x00;
//PMP_data = 0x0F;
//PMDIN1L = PMP_data; // used for write data test
PMP_data = PMDIN1L; // used for read data test
lcd_gotoxy(1,1);
lcd_putc("DATA is=");
lcd_gotoxy(1,2);
Lcd_display_byte(1,2,PMP_data); // used a 2*8 LCD for show data which read from data port
} |
Thanks! |
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Ttelmah
Joined: 11 Mar 2010
Posts: 19215
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| Posted: Mon Dec 18, 2017 2:00 am |
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Well done.
Unfortunately, the sheer number of modes on some chips, really says that CCS need to 're-think' how the PIC18 function works. It'd be much more friendly to have the function offering separate fields for the mode, output mask etc., and a proper example. Like you I had to go 'DIY' to get it to work properly.
At least you now have it going.  |
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