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adc function in interrupt sub-routine
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PROMOD



Joined: 01 Feb 2018
Posts: 42

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PostPosted: Mon Oct 29, 2018 10:03 pm     Reply with quote

Code:
#include<18f4431.h>
#device adc=10
#fuses xt,nowdt,nolvp
#use delay(clock=2000000)
#include "flex.c"
float k=0,a=0,r=0,p=0,average,energy,energy_consumed; int16 i=0,q=0;

void main()
{
lcd_init();
setup_adc_ports(PIN_C0, PIN_C1);
setup_adc(ADC_CLOCK_DIV_2);
set_adc_channel(0);
k=read_adc();
set_adc_channel(1);
a=read_adc();
printf(lcd_putc,"EC=%f",a);
while(1)
{
}
}
According to the above program:
Fosc=2Mhz
TAD=1micro second
A/D Conversion Time=12TAD=12micro second

Am I correct?
Ttelmah



Joined: 11 Mar 2010
Posts: 19195

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PostPosted: Tue Oct 30, 2018 2:56 am     Reply with quote

Several issues:

First, there needs to be a delay of at least Tacq, between selecting the ADC channel, and starting an acquisition. You do not have this.
Then the timing is slightly more complex than you are assuming. On your chip, you set the bit to start the acquisition, and the actual sampling starts one instruction time later. So trigger, wait one instruction, then start. This is done so that the instruction after the trigger can if required be a 'sleep' instruction if using the RC clock. The conversion itself then takes 11 Tad cycles from this point, and the GO bit is then cleared as the second clock cycle of the instruction after this point. So as the data sheet tells you, the total time needed for the conversion is a minimum of 11*Tad+2Tcy, to a maximum of 11Tad+6Tcy. So with the clocks you show, between 12uSec, and 14uSec. Then (of course), the code loop waiting to see the 'GO' clear, has to actually detect this, branch out, and the registers have to be read. So probably at least another ten instruction cycles to actually get the result. So if you were just reading the ADC in a loop, and doing nothing else, the total time would be perhaps 19 to 21uSec. If you then add code to actually do something with the result, this would probably double...
Only chips using DMA to store the result can even get 'close' the the actual ADC performance rate. Using these, you have to then use the hardware ability to delay the conversion for Tacq, since you do not then have any code to add this delay.

So with the clocks shown, the _minimum_ time for the ADC cycle is the 12uSec you say, but depending on the exact synchronisation of the clocks, it may be up to 14uSec, while the total time for a code loop to 'use' this would be more like double or triple this time.
PROMOD



Joined: 01 Feb 2018
Posts: 42

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PostPosted: Tue Oct 30, 2018 4:32 am     Reply with quote

One more things:
Code:
void main()
{
lcd_init();
setup_adc_ports(PIN_C0, PIN_C1);
setup_adc(ADC_CLOCK_DIV_2);
set_adc_channel(0);
k=read_adc();
set_adc_channel(1);
a=read_adc();
printf(lcd_putc,"EC=%f",a);
while(1)
{
}
}
In the above code channel 0 & 1 are being captured and sampled sequentially I mean first channel 0 then channel 1. If I would like the capture and sample both the channel 0 & 1 simultaneously(at the same moment) then what change should I bring in code?
temtronic



Joined: 01 Jul 2010
Posts: 9081
Location: Greensville,Ontario

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PostPosted: Tue Oct 30, 2018 5:00 am     Reply with quote

At first I was going to say you can't but that chip does have a Sample/Hold mux before the ADC,so it pays to read the datasheets!
It should be easy to setup though.
You'll need to readup on how CCS configures the ADC section for 'STNM1' mode. uChip descibes how in sectin 20.1 of the datasheet. I assume the device header will have the information you need for the names of the bits of the registers that have to be configured. The CCS manual should have the functions . There may be an example as well

Jay
Ttelmah



Joined: 11 Mar 2010
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PostPosted: Tue Oct 30, 2018 5:08 am     Reply with quote

Your syntax for setup_adc_ports is wrong. This is _not_ how you select the channels fed to the multiplexer. Look at the examples, and the .h file for your processor.

If you are using the 4431, neither pin_c0, nor pin_c1, can be read by the ADC anyway.

You will not get simultaneous sampling. There is only one ADC.
To do fast sequential sampling, you use multiple parameters to the set_adc_channel command, and a sequential sampling setting. So (for instance):

set_adc_channel(3,1);

Sets AN3, and AN1 to be sampled. You are limited in the channels that can be chosen (look at ADCHS in the data sheet).

setup_adc(ADC_CLOCK_DIV_2 | ADC_TAD_MUL_2 | ADC_SINGLE_SHOT_A_B | ADC_FIFO_ENABLED);

sets up the ADC to automatically sequentially sample one channel from group A, then one from group B with Tacq automatically generated, and the output FIFO available.

Then read_adc(); will return the first result from channel A, and read_adc(ADC_READ_ONLY); will not perform another conversion, but return the second result from channel B.
temtronic



Joined: 01 Jul 2010
Posts: 9081
Location: Greensville,Ontario

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PostPosted: Tue Oct 30, 2018 7:38 am     Reply with quote

As Mr. T points out, since there's only one ADC so 'true' simultaneous readings are not 'technically' possible but.....the way I read the datasheet, the ADC subsection, if configured properly, does read 2 S&H inputs and stores the ADC result into a FIFO buffer. From a practical viewpoint, if you have a high clock speed, it will be very,very close to 'simultaneous'.
The last S&H ADC project I worked on was 30 years ago, 32 channels/16 bit...'fun'.

What really matters is the application. If I read your original program I assume this is some form of 'energy monitor' device. If so, then you really don't need ultra high speed, simultaneous readings of V and I. AC power is usually 50 or 60Hz....snail slow compared to any PIC !

Jay
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